Along with rapid development of computer technologies and integrated circuit technologies, in order to meet requirements of economic and social development, multi-path computer systems or multi-node interconnection systems become one of bottlenecks in key fields restraining social development. Information fields such as enormous data calculation and data analysis, complicated graphical analysis, and scientific computation have extremely high requirements on performance of a computer system. Therefore, it is required to construct a huge multi-path computer system to better adapt to application requirements of various current fields. However, on the other hand, a technical problem of multi-path computer system interconnection is also encountered, a limited PCB area brings difficulty in designing a multi-path or multi-node interconnection system, and a high-speed interconnection system also designs a specification for a transmission length of a link, which further increases the difficulty in designing the node interconnection system. Adopting a reasonable chip and extending the length of node interconnection trace while meeting the design specification is one of effective methods for effectively reducing design risks and reducing design difficulties.